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  1. Dec 10, 2021
    • Geo Ster's avatar
      Groundwork for IOP DMA implementation · 1cce9b6f
      Geo Ster authored
      * The DMA routine on the IOP works similarly to the PSX version with a
      few additions. There are 7 channels from the PSX and an additional 6 new
      PS2 exclusive ones. One the PSX, each channel has 3 registers used
      to configure and use it and 3 global registers.
      
      * The PS2 contains all the older DMA registers, but it add 6 more channels
      and duplicates the global registers (DPCR now has a counterpart called DPCR2)
      This is done because each global register can control up to 7 channels.
      An additional register on each channel (tadr) and 2 additional
      global registers have been added as well. For now we don't really
      care to implement them, only read/write to them.
      
      * For reading and writing to the registers structs are used to prevent
      the usage of switch and if statements.
      1cce9b6f
  2. Dec 04, 2021
    • Geo Ster's avatar
      Fix load instruction logging in IOP · 42172fa2
      Geo Ster authored
      * Due to load delay slots the target register doesn't get
      written immediately, so use the value instead to correctly
      display the loaded value in the logs
      42172fa2
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