Fix bug in jump instructions
* As stated in earlier commits we prefetch next instruction before the current one gets executed to guarantee that we have it available in case a branch instruction changes the PC. So a typical fetch cycle for a branch instruction would look like: /* Cycle 1. */ instr = <something> next_instr = read(PC) -> jump PC += 4 (now it points to the branch delay) /* Cycle 2. */ instr = jump next_instr = read(PC) -> branch delay PC += 4 (now it points to the instruction AFTER the delay slot) <execute branch> So if a branch uses offsets instead of hard coding the PC, it will point to the wrong address since it expects to have the PC pointing to the branch delay instruction. To fix this, subtrack 4 from the pc.
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