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Commit a81117ea authored by Geo Ster's avatar Geo Ster
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Initial GIF implementation

Currently there's nothing really of note, it's just an empty
class that handles reads/writes to some of the registers. The
functionality will be explained in subsequent commits. Along with
this I've added a new document, from which, the GIF implementation will
be based on.
parent 622034ef
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......@@ -19,6 +19,7 @@ add_executable(${PROJECT_NAME}
"src/cpu/iop/timers.cc"
"src/cpu/ee/intc.cc"
"src/cpu/iop/intr.cc"
"src/gs/gif.cc"
)
# Link to all the required conan libs
......
File added
#include <common/emulator.h>
#include <cpu/ee/ee.h>
#include <cpu/iop/iop.h>
#include <gs/gif.h>
#include <cassert>
int cycles_executed = 0;
......@@ -20,6 +21,7 @@ namespace common
ee = std::make_unique<ee::EmotionEngine>(this);
iop = std::make_unique<iop::IOProcessor>(this);
iop_dma = std::make_unique<iop::DMAController>(this);
gif = std::make_unique<gs::GIF>(this);
}
Emulator::~Emulator()
......
......@@ -15,6 +15,11 @@ namespace iop
class IOProcessor;
}
namespace gs
{
struct GIF;
}
namespace common
{
constexpr uint32_t KUSEG_MASKS[8] =
......@@ -64,9 +69,10 @@ namespace common
std::unique_ptr<ee::EmotionEngine> ee;
std::unique_ptr<iop::IOProcessor> iop;
std::unique_ptr<iop::DMAController> iop_dma;
std::unique_ptr<gs::GIF> gif;
/* Memory - Registers */
uint8_t * bios;
uint8_t* bios;
uint32_t MCH_RICM = 0, MCH_DRD = 0;
uint8_t rdram_sdevid = 0;
......
#include <gs/gif.h>
#include <common/emulator.h>
#include <cassert>
#include <fmt/core.h>
static const char* REGS[10] =
{
"GIF_CTRL",
"GIF_MODE",
"GIF_STAT",
"GIF_TAG0",
"GIF_TAG1",
"GIF_TAG2",
"GIF_TAG3",
"GIF_CNT",
"GIF_P3CNT",
"GIF_P3TAG"
};
namespace gs
{
GIF::GIF(common::Emulator* parent) :
emulator(parent)
{
uint32_t PAGE1 = common::Emulator::calculate_page(0x10003000);
emulator->add_handler(PAGE1, this, &GIF::read, &GIF::write);
}
uint64_t GIF::read(uint32_t addr)
{
assert(addr <= 0x100030A0);
uint32_t offset = (addr & 0xf0) >> 4;
auto ptr = (uint32_t*)&regs + offset;
fmt::print("[GIF] Read {:#x} from {}\n", *ptr, REGS[offset]);
return *ptr;
}
void GIF::write(uint32_t addr, uint64_t data)
{
assert(addr <= 0x100030A0);
uint32_t offset = (addr & 0xf0) >> 4;
auto ptr = (uint32_t*)&regs + offset;
fmt::print("[GIF] Write {:#x} to {}\n", data, REGS[offset]);
*ptr = data;
}
}
\ No newline at end of file
#pragma once
#include <common/component.h>
namespace common
{
class Emulator;
}
namespace gs
{
union GIFSTAT
{
uint32_t value;
struct
{
uint32_t M3R : 1;
uint32_t M3P : 1;
uint32_t IMT : 1;
uint32_t PSE : 1;
uint32_t IP3 : 1;
uint32_t P3Q : 1;
uint32_t P2Q : 1;
uint32_t P1Q : 1;
uint32_t OPH : 1;
uint32_t APATH : 2;
uint32_t DIR : 1;
uint32_t : 12;
uint32_t FQC : 5;
uint32_t : 3;
};
};
struct GIFRegs
{
uint32_t GIF_CTRL;
uint32_t GIF_MODE;
GIFSTAT GIF_STAT;
uint32_t GIF_TAG0;
uint32_t GIF_TAG1;
uint32_t GIF_TAG2;
uint32_t GIF_TAG3;
uint32_t GIF_CNT;
uint32_t GIF_P3CNT;
uint32_t GIF_P3TAG;
};
struct GIF : public common::Component
{
GIF(common::Emulator* parent);
uint64_t read(uint32_t addr);
void write(uint32_t addr, uint64_t data);
private:
common::Emulator* emulator;
GIFRegs regs = {};
};
}
\ No newline at end of file
#pragma once
#include <common/component.h>
namespace gs
{
/* These can be accessed from the EE */
struct PrivRegs
{
uint64_t PMODE;
uint64_t SMODE1;
uint64_t SMODE2;
uint64_t SRFSH;
uint64_t SYNCH1;
uint64_t SYNCH2;
uint64_t SYNCV;
uint64_t DISPFB1;
uint64_t DISPLAY1;
uint64_t DISPFB2;
uint64_t DISPLAY2;
uint64_t EXTBUF;
uint64_t EXTDATA;
uint64_t EXTWRITE;
uint64_t BGCOLOR;
uint64_t GS_CSR;
uint64_t GS_IMR;
uint64_t BUSDIR;
uint64_t SIGLBLID;
};
class GS : public common::Component
{
};
}
\ No newline at end of file
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