* MIPS has an architectural feature, where instead of flushing the
pipeline when executing a branch instruction, it goes ahead and executes
the instruction following the branch as well. Flushing the pipeline
is costly and is the cause of those complex branch predictors on
modern CPUs that try to guess when a branch will be taken.

* To properly emulate this behaviour we must act how the pipeline acts. We
will always have 2 instructions loaded the current one and the next one. This way
we can load the instruction after the branch even though the pc changes.